Tuesday, 07 February 2017 at 00:00
This is a PATC course and it will be held in English.
For registration go to the web page of the PATC course.
In the roadmap toward next-generation supercomputers it is evident that heterogeneous architectures are taking an important share in the HPC market, and the consolidation of this kind of architectures requires an important effort in software development and applications refactoring. Moreover, in recent years Arm has started to emerge as a viable architecture for large scale HPC deployments, and more than one exascale projects being develop in the world are based on Arm architectures.
This school focus on software development techniques to address the implementation of new HPC applications and the re-factory of existing ones, in the era of heterogeneous, energy efficient, massively parallel architectures, toward exascale.
Two days of the school will be reserved for a workshop that will provide an introduction to, and hands on experience working with, the Arm HPC architecture and the accompanying ecosystem. It will be discussed the specifics of the Armv8 architecture, and their implications, and introduce some of the current HPC processors developed on this architecture. For the hands on exercises we will provide tutorials, to work through an introduction to the compiler and maths libraries, as well as the performance tools to be tested on the Arm cluster installed at Cineca. As a more advanced topic for the workshop we will introduce the upcoming vectorisation exstension SVE, and provide a guided tutorial on how to use the Arm instruction emulator to execute next generation code.
Software engineering techniques and high productivity languages will complement lectures on parallel programming and porting toward new architectures, to allow the implementation of application that can be maintained across a complex and fast evolving HPC architectures.
- Heterogeneous architectures
- Arm HPC architecture
- Elements of software engineering
- Parallel programming techniques for throughput CPUs (Nvidia and Intel)
- Parallel programming techniques for massively parallel applications
- Introduction to Python for high performance computing
- Models for applications integrating MPI, OpenMP OpenACC, CUDA and CUDA Fortran paradigms
The school is aimed at PRACE users, final year master students, PhD students, and young researchers in computational sciences and engineering, with different backgrounds, interested in applying the emerging technologies on high performance computing to their research.
Good knowledge of parallel programming with MPI and/or OpenMP, knowledge of FORTRAN and C languages. Basic knowledge of parallel computer architectures.
Attendance is free.
A grant of 250 EUR (for students working abroad) and 150 EUR (for students working in Italy) will be available for participants not funded by their institution and not working or living in the Bologna area. Documentation will be required. Lunch will be provided by Cineca. Each student will be given a two month access to the Cineca's supercomputing resources.
The number of participants is limited to 25 students.
Applicants will be selected according to their experience, qualifications and scientific interest BASED ON WHAT WRITTEN IN THE REGISTRATION FORM.
DUE TO PRIVACY REASON THE STUDENTS ADMITTED AND NOT ADMITTED WILL BE CONTACTED VIA EMAIL ON JANUARY, FRIDAY 18TH. IF YOU SUBMITTED AND DON'T RECEIVE THE EMAIL, PLEASE WRITE AT email@example.com.
The support of CINI for the software engineering module is gratefully acknowledged.