Marconi is the new CINECA class Tier-0 supercomputer, based on the next-generation of the Intel® Xeon Phi™ product family “Knights Landing” alongside with Intel® Xeon® processor E5-2600 v4 product family. It has been co-designed by Cineca on the Lenovo NeXtScale architecture.
Its full deployment will take place in three steps:
the first one started mid-2016 and involved an architecture based on Intel Xeon E5-2697 v4 (Broadwell). The second one added Knights Landing to the mix, and was developed within the end of 2016 and the beginning of 2017. The third and final one, about Broadwell'successor Intel Skylake, will be completed within mid-2017, and will let Marconi reach an estimated peak performance of about 20 Pflop/s, with storage capacity of 20 petabytes, while maintaining a low energy consumption.
This course intends to support the scientific community to efficiently exploit the Marconi system. More precisely, the course aims at providing a full description of the Marconi configuration at Cineca, with special emphasis on main crucial aspects for users and application developers. For instance, details about compilation, debugging and optimization procedures will be provided, together with an overview of the available libraries, tools and applications currently available on the system. Examples of submission jobs will be discussed, together with scheduler (PBS) commands and queue definitions.
2017 editions of the course will be focused on the next-generation of the Intel® Xeon Phi™ product family available on Marconi.
Overview of Intel’s “Knights Landing” (KNL) processors on Marconi and software (hardware components, network and partitioning, type of nodes and software stack). Developing applications for KNL resources on Marconi (compilers, libraries, available debugging and profiling tools). Running and monitoring jobs on KNL resources on MARCONI (modules environment @ CINECA, PBS queueing system, job script examples).
Users and developers on the MARCONI Tier-0 system.
Basic knowledge of Linux/UNIX.